1. Field of the Invention
The present invention relates to a capacitive element, a manufacturing method of the same, a solid-state imaging device, and an imaging apparatus.
2. Description of the Related Art
The MOS capacitor has an inflection point (inversion and accumulation in the case of n-type and p-type, respectively) in the capacitance value near the flat band, and its capacitance value varies with the gate voltage.
As a capacitor that has an inflection point near the flat band, or specifically a capacitor without voltage following characteristics, a capacitive element of the structure including a gate electrode, a silicon oxide (SiO2) film, and a silicon layer with high-concentration impurities is known. In such a capacitive element, a silicon substrate is subjected to high-concentration ion implantation to degenerate the silicon Fermi level, and the resulting metal-like portion is used as the channel layer. After the ion implantation, a thermally-oxidized film is formed on a surface of the silicon substrate, and a gate electrode is formed via the thermally-oxidized film to form the capacitive element.
For example, JP-A-61-048957 discloses a technique in which, after forming a thermally-oxidized film on a semiconductor substrate surface, an opening is formed through the thermally-oxidized film, and a thin oxide film is formed on the semiconductor substrate in the opening. Then, high-concentration ion implantation is performed over the thin oxide film to form a high-concentration region in the semiconductor substrate, and a metal electrode is formed on the thin oxide film to form a MOS capacitor.
Generally, an element isolation region of a LOCOS structure or an STI (Shallow Trench Isolation) structure is formed in the region of a silicon substrate where the capacitive element is formed. Descriptions below are based on an element isolation region of a LOCOS structure.
To prevent contamination, knocking, and damage during ion implantation, a pre-oxide film realized by a thin thermally-oxidized film of, for example, 10 nm to 30 nm thickness is formed on the silicon substrate surface after forming the element isolation region.
Then, in order to produce a channel in the high concentration region, impurities are ion implanted at high concentration over the pre-oxide film. Here, as in the channel region, impurities are ion implanted at high concentration also in, for example, the element isolation region (silicon oxide film).
Then, as illustrated in FIG. 20A, an element isolation region 112 formed of a silicon oxide film is formed on a silicon substrate 111 using a LOCOS method (local oxidation method), and a pre-oxide film 151 is formed on the silicon substrate 111. The silicon substrate 111 is then subjected to high-concentration ion implantation through the pre-oxide film 151 to form a first electrode 121 formed of a diffusion layer. Here, the silicon oxide film of the element isolation region 112 not covered by a resist mask 141 is damaged by the ion implantation (not shown). Though not shown, the silicon substrate 111 is subjected to low-concentration ion implantation underneath the edge of the element isolation region 112.
After the ion implantation, the pre-oxide film 151 is removed with a hydrofluoric acid-based chemical in the pre-washing performed to form a capacitor oxide film, and the surface of the silicon substrate 111 is cleaned by SC washing (APM washing).
As a result, as illustrated in FIG. 20B, the pre-oxide film 151 (see FIG. 20A) is removed, and the silicon substrate 111 is exposed.
However, in practice, as illustrated in FIG. 21A, the silicon oxide film of the element isolation region 112 damaged during the ion implantation is overetched more than undamaged portions in the removal of the pre-oxide film 151 (see FIG. 20A). This is because the silicon oxide film of the element isolation region 112 damaged during the ion implantation has a faster etching rate than undamaged portions.
The portion subjected to the high-concentration ion implantation at the edge of the element isolation region 112 is damaged by the ion implantation, and thus the silicon oxide film of the element isolation region 112 is overetched and the silicon substrate 111 is exposed. The overetching of the silicon oxide film is particularly notable at the bird's beak portion of the LOCOS structure. The overetching is particularly prominent when the amount of ion implanted impurities (dose) is 1×1014/cm2 or more.
As a result, a silicon substrate portion 111A not subjected to high-concentration ion implantation is exposed.
Thereafter, as illustrated in FIG. 21B, a capacitor oxide film 122 is formed on the surface of the silicon substrate 111 using, for example, a thermal oxidation method. Here, because the impurity concentration is higher in the first electrode 121 portion, the capacitor oxide film 122 becomes therein thicker than in the silicon substrate portion 111A not subjected to high-concentration ion implantation. That is, what is known as enhanced oxidation occurs. Because the silicon substrate portion 111A exposed by the overetching of the element isolation region 112 is shielded by the element isolation region 112 and is not subjected to high-concentration ion implantation, the capacitor oxide film 122 becomes thinner therein than in the portion subjected to high-concentration ion implantation (first electrode 121).
Then, as illustrated in FIG. 22, a second electrode 123 is formed on the capacitor oxide film 122 to form a capacitive element 120 including the first electrode 121, the capacitor oxide film 122, and the second electrode 123. Because the capacitor oxide film 122 has thickness variation, the thin portion at the edge of the element isolation region 112 also acts as a capacitor in the capacitive element 120 using the capacitor oxide film 122, and this capacitor presents the problem of parasitic capacitance. Further, such a portion acts as a parallel capacitor, and causes deterioration in the overall voltage following characteristics of the capacitive element. Furthermore, the voltage resistance is low in the thin portion of the capacitor oxide film 122. As a result, the reliability of the capacitive element 120 is poor.